Semiconductor chips typically comprise the bulk of the components in an electronic system. These semiconductor chips are also often the hottest part of the electronic system, and failure of the system can often be traced back to thermal overload on the chips. As such, thermal management is a critical parameter of semiconductor chip design.
FIG. 1 is a schematic diagram illustrating an exemplary semiconductor chip 100. As illustrated, the semiconductor chip 100 comprises one or more semiconductor devices 102a-102n (hereinafter collectively referred to as “semiconductor devices 102”), such as transistors, resistors, capacitors, diodes and the like deposited upon a substrate 104 and coupled via a plurality of wires or interconnects 106a-106n (hereinafter collectively referred to as “interconnects 106”). These semiconductor devices 102 and interconnects 106 share power, thereby causing a distribution of temperature values over the chip 100 that may range from 100 to 180 degrees Celsius in various regions of the chip 100.
In addition to large absolute temperatures, large variations in the thermal gradient over a semiconductor chip can cause the chip to fail in operation. Thus, accurate knowledge of the expected thermal gradient is critical in determining the layout of the chip. Unfortunately, though many methods exist for performing thermal analysis of semiconductor chips, such conventional methods typically fail to provide a complete or an entirely accurate picture of the chip's operating thermal gradient. For example, typical thermal analysis models attempt to solve the temperature on the chip substrate, but do not solve the temperature in a full three dimensions, e.g., using industry standards design, package and heat sink data. Moreover, most typical methods do not account for the sharing of power among semiconductor devices and interconnects, which distributes the heat field within the chip, as discussed above.
Therefore, there is a need in the art for a method and apparatus for normalizing thermal gradients over semiconductor chip designs.